#ifndef _ADAU1701_H
#define _ADAU1701_H
#include "stm32f10x.h"
#include "sys.h"
#define ADAU1701_I2C_WR 0 /* 寫控制bit */
#define ADAU1701_I2C_RD 1 /* 讀控制bit */
#define ClockSpeed 100000
typedef unsigned short ADI_DATA_U16;
typedef const int ADI_REG_TYPE; //define data storing in flash.
#define DEVICE_ADDR_ 0x68 //設備地址
#define Address_Length 2 //define address as 16bit. //define address as 16bit.
#define SIGMASTUDIOTYPE_FIXPOINT 0
#define SIGMASTUDIOTYPE_INTEGER 1
/*
* 閱讀設備寄存器
*/
#define SIGMA_READ_REGISTER( devAddress, address, length, pData ) {/*TODO: implement macro or define as function*/}
/*
* 設置寄存器字段的值
*/
#define SIGMA_SET_REGSITER_FIELD( regVal, fieldVal, fieldMask, fieldShift ) \
{ (regVal) = (((regVal) & (~(fieldMask))) | (((fieldVal) << (fieldShift)) && (fieldMask))) }
/*
* 獲取寄存器字段的值
*/
#define SIGMA_GET_REGSITER_FIELD( regVal, fieldMask, fieldShift ) \
{ ((regVal) & (fieldMask)) >> (fieldShift) }
/*
將浮點值轉換為SigmaDSP(5.23)定點格式，此可選宏用于具有特殊實現的系統
*/
#define SIGMASTUDIOTYPE_FIXPOINT_CONVERT( _value ) {/*TODO: IMPLEMENT MACRO*/}
/*
* Convert integer data to system compatible format
* This optional macro is intended for systems having special implementation
* requirements (for example: limited memory size or endianness)
*/
#define SIGMASTUDIOTYPE_INTEGER_CONVERT( _value ) {/*TODO: IMPLEMENT MACRO*/}
#define ADAU1701_GPIO_PORT_I2C GPIOB /* GPIO端口 */
#define ADAU1701_RCC_I2C_PORT RCC_APB2Periph_GPIOB /* GPIO端口時鐘 */
#define ADAU1701_I2C_SCL_PIN GPIO_Pin_10 /* 連接到SCL時鐘線的GPIO */
#define ADAU1701_I2C_SDA_PIN GPIO_Pin_11 /* 連接到SDA數據線的GPIO */
#define ADAU1701_I2C_SCL_1() GPIO_SetBits(ADAU1701_GPIO_PORT_I2C, ADAU1701_I2C_SCL_PIN) /* SCL = 1 */
#define ADAU1701_I2C_SCL_0() GPIO_ResetBits(ADAU1701_GPIO_PORT_I2C, ADAU1701_I2C_SCL_PIN) /* SCL = 0 */
#define ADAU1701_I2C_SDA_1() GPIO_SetBits(ADAU1701_GPIO_PORT_I2C, ADAU1701_I2C_SDA_PIN) /* SDA = 1 */
#define ADAU1701_I2C_SDA_0() GPIO_ResetBits(ADAU1701_GPIO_PORT_I2C, ADAU1701_I2C_SDA_PIN) /* SDA = 0 */
#define ADAU1701_I2C_SDA_READ() GPIO_ReadInputDataBit(ADAU1701_GPIO_PORT_I2C, ADAU1701_I2C_SDA_PIN) /* 讀SDA口線狀態 */
void i2c_CfgGpio(void); //I2C 引腳配置
void i2c_Start(void); //開始信號
void i2c_Stop(void); //結束信號
void i2c_SendByte(uint8_t _ucByte); //發送一個字節
uint8_t i2c_ReadByte(void); //接收一個字節
uint8_t i2c_WaitAck(void); //等待應答
void i2c_Ack(void); //應答
void i2c_NAck(void); //非應答
uint8_t i2c_CheckDevice(uint8_t _Address);//檢查設備地址是否存在
void SIGMA_WRITE_REGISTER_BLOCK(int devAddress, int address, int length, const ADI_REG_TYPE *pData ) ; // 向寄存器寫一塊數據
void SIGMA_SAFELOAD_WRITE_REGISTER(int devAddress, int address, int length, const ADI_REG_TYPE *pData ) ;
void MASTER_MUTE_download(void); // 靜音
void MASTER_UNMUTE_download(void); // 取消靜音
// 調節bass
void BASS0_download(void); // 調 bass 為 0
void BASS1_download(void); // 調 bass 為 +1
void BASS2_download(void); // 調 bass 為 +2
void BASS3_download(void); // 調 bass 為 +3
void BASS4_download(void); // 調 bass 為 +4
void BASS5_download(void); // 調 bass 為 +5
void BASS6_download(void); // 調 bass 為 +6
void BASS7_download(void); // 調 bass 為 +7
void BASS8_download(void); // 調 bass 為 +8
void BASS9_download(void); // 調 bass 為 +9
void BASS10_download(void); // 調 bass 為 +10
void BASS_1_download(void); // 調 bass 為 -1
void BASS_2_download(void); // 調 bass 為 -2
void BASS_3_download(void); // 調 bass 為 -3
void BASS_4_download(void); // 調 bass 為 -4
void BASS_5_download(void); // 調 bass 為 -5
void BASS_6_download(void); // 調 bass 為 -6
void BASS_7_download(void); // 調 bass 為 -7
void BASS_8_download(void); // 調 bass 為 -8
void BASS_9_download(void); // 調 bass 為 -9
void BASS_10_download(void); // 調 bass 為 -10
// 調節Treble
void TRE0_download(void); // 調 Treble 為 0
void TRE1_download(void); // 調 Treble 為 +1
void TRE2_download(void); // 調 Treble 為 +2
void TRE3_download(void); // 調 Treble 為 +3
void TRE4_download(void); // 調 Treble 為 +4
void TRE5_download(void); // 調 Treble 為 +5
void TRE6_download(void); // 調 Treble 為 +6
void TRE7_download(void); // 調 Treble 為 +7
void TRE8_download(void); // 調 Treble 為 +8
void TRE9_download(void); // 調 Treble 為 +9
void TRE10_download(void); // 調 Treble 為 +10
void TRE_1_download(void); // 調 Treble 為 -1
void TRE_2_download(void); // 調 Treble 為 -2
void TRE_3_download(void); // 調 Treble 為 -3
void TRE_4_download(void); // 調 Treble 為 -4
void TRE_5_download(void); // 調 Treble 為 -5
void TRE_6_download(void); // 調 Treble 為 -6
void TRE_7_download(void); // 調 Treble 為 -7
void TRE_8_download(void); // 調 Treble 為 -8
void TRE_9_download(void); // 調 Treble 為 -9
void TRE_10_download(void); // 調 Treble 為 -10
#endif
#include "adau1701.h"
/*
*********************************************************************************************************
* 函 數 名: i2c_CfgGpio
* 功能說明: 配置I2C總線的GPIO，采用模擬IO的方式實現
* 形 參：無
* 返 回 值: 無
*********************************************************************************************************
*/
void i2c_CfgGpio(void)
{
GPIO_InitTypeDef GPIO_InitStructure;
RCC_APB2PeriphClockCmd(ADAU1701_RCC_I2C_PORT, ENABLE); /* 打開GPIO時鐘 */
GPIO_InitStructure.GPIO_Pin = ADAU1701_I2C_SCL_PIN | ADAU1701_I2C_SDA_PIN;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_OD; /* 開漏輸出 */
GPIO_Init(ADAU1701_GPIO_PORT_I2C, &GPIO_InitStructure);
/* 給一個停止信號, 復位I2C總線上的所有設備到待機模式 */
i2c_Stop();
}
static void i2c_Delay(void) // i2c 延時
{
uint8_t i;
/*
下面的時間是通過邏輯分析儀測試得到的。
工作條件：CPU主頻72MHz ，MDK編譯環境，1級優化
循環次數為10時，SCL頻率 = 205KHz
循環次數為7時，SCL頻率 = 347KHz， SCL高電平時間1.5us，SCL低電平時間2.87us
循環次數為5時，SCL頻率 = 421KHz， SCL高電平時間1.25us，SCL低電平時間2.375us
*/
for (i = 0; i < 10; i++);
}
/*
*********************************************************************************************************
* 函 數 名: i2c_Start
* 功能說明: CPU發起I2C總線啟動信號
* 形 參：無
* 返 回 值: 無
*********************************************************************************************************
*/
void i2c_Start(void)
{
/* 當SCL高電平時，SDA出現一個下跳沿表示I2C總線啟動信號 */
ADAU1701_I2C_SDA_1();
ADAU1701_I2C_SCL_1();
i2c_Delay();
ADAU1701_I2C_SDA_0();
i2c_Delay();
ADAU1701_I2C_SCL_0(); // 牽住時鐘線，準備發送數據
i2c_Delay();
}
/*
*********************************************************************************************************
* 函 數 名: i2c_Start
* 功能說明: CPU發起I2C總線停止信號
* 形 參：無
* 返 回 值: 無
*********************************************************************************************************
*/
void i2c_Stop(void)
{
/* 當SCL高電平時，SDA出現一個上跳沿表示I2C總線停止信號 */
ADAU1701_I2C_SDA_0();
ADAU1701_I2C_SCL_1();
i2c_Delay();
ADAU1701_I2C_SDA_1();
}
/*
*********************************************************************************************************
* 函 數 名: i2c_WaitAck
* 功能說明: CPU產生一個時鐘，并讀取器件的ACK應答信號
* 形 參：無
* 返 回 值: 返回0表示正確應答，1表示無器件響應
*********************************************************************************************************
*/
uint8_t i2c_WaitAck(void)
{
uint8_t re;
ADAU1701_I2C_SDA_1(); /* CPU釋放SDA總線 */
i2c_Delay();
ADAU1701_I2C_SCL_1(); /* CPU驅動SCL = 1, 此時器件會返回ACK應答 */
i2c_Delay();
if (ADAU1701_I2C_SDA_READ()) /* CPU讀取SDA口線狀態 */
{
re = 1;
}
else
{
re = 0;
}
ADAU1701_I2C_SCL_0();
i2c_Delay();
return re;
}
/*
*********************************************************************************************************
* 函 數 名: i2c_Ack
* 功能說明: CPU產生一個ACK信號
* 形 參：無
* 返 回 值: 無
*********************************************************************************************************
*/
void i2c_Ack(void)
{
ADAU1701_I2C_SDA_0(); /* CPU驅動SDA = 0 */
i2c_Delay();
ADAU1701_I2C_SCL_1(); /* CPU產生1個時鐘 */
i2c_Delay();
ADAU1701_I2C_SCL_0();
i2c_Delay();
ADAU1701_I2C_SDA_1(); /* CPU釋放SDA總線 */
}
/*
*********************************************************************************************************
* 函 數 名: i2c_NAck
* 功能說明: CPU產生1個NACK信號
* 形 參：無
* 返 回 值: 無
*********************************************************************************************************
*/
void i2c_NAck(void)
{
ADAU1701_I2C_SDA_1(); /* CPU驅動SDA = 1 */
i2c_Delay();
ADAU1701_I2C_SCL_1(); /* CPU產生1個時鐘 */
i2c_Delay();
ADAU1701_I2C_SCL_0();
i2c_Delay();
}
/*
*********************************************************************************************************
* 函 數 名: i2c_SendByte
* 功能說明: CPU向I2C總線設備發送8bit數據
* 形 參：_ucByte ： 等待發送的字節
* 返 回 值: 無
*********************************************************************************************************
*/
void i2c_SendByte(uint8_t _ucByte)
{
uint8_t i;
/* 先發送字節的高位bit7 */
for (i = 0; i < 8; i++)
{
if (_ucByte & 0x80)
{
ADAU1701_I2C_SDA_1();
}
else
{
ADAU1701_I2C_SDA_0();
}
i2c_Delay();
ADAU1701_I2C_SCL_1();
i2c_Delay();
ADAU1701_I2C_SCL_0();
if (i == 7)
{
ADAU1701_I2C_SDA_1(); // 釋放總線
}
_ucByte <<= 1; /* 左移一個bit */
i2c_Delay();
}
}
/*
*********************************************************************************************************
* 函 數 名: i2c_ReadByte
* 功能說明: CPU從I2C總線設備讀取8bit數據
* 形 參：無
* 返 回 值: 讀到的數據
*********************************************************************************************************
*/
uint8_t i2c_ReadByte(void)
{
uint8_t i;
uint8_t value;
/* 讀到第1個bit為數據的bit7 */
value = 0;
for (i = 0; i < 8; i++)
{
value <<= 1;
ADAU1701_I2C_SCL_1();
i2c_Delay();
if (ADAU1701_I2C_SDA_READ())
{
value++;
}
ADAU1701_I2C_SCL_0();
i2c_Delay();
}
return value;
}
/*
*********************************************************************************************************
* 函 數 名: i2c_CheckDevice
* 功能說明: 檢測I2C總線設備，CPU向發送設備地址，然后讀取設備應答來判斷該設備是否存在
* 形 參：_Address：設備的I2C總線地址
* 返 回 值: 返回值 0 表示正確， 返回1表示未探測到
*********************************************************************************************************
*/
uint8_t i2c_CheckDevice(uint8_t _Address)
{
uint8_t ucAck;
i2c_CfgGpio(); /* 配置GPIO */
i2c_Start(); /* 發送啟動信號 */
/* 發送設備地址+讀寫控制bit（0 = w， 1 = r) bit7 先傳 */
i2c_SendByte(_Address | ADAU1701_I2C_WR);
ucAck = i2c_WaitAck(); /* 檢測設備的ACK應答 */
i2c_Stop(); /* 發送停止信號 */
return ucAck;
}
void SIGMA_WRITE_REGISTER_BLOCK(int devAddress, int address, int length, const ADI_REG_TYPE *pData )
{
uint8_t subaddress0;
uint8_t subaddress1;
uint16_t i;
subaddress0 = (address & 0xFF00)>>8;
subaddress1 = address & 0x00FF;
i2c_Start();
i2c_SendByte(devAddress); // 設備地址
i2c_WaitAck(); // 等待應答
i2c_SendByte(subaddress0); // 寄存器高位地址
i2c_WaitAck(); // 等待應答
i2c_SendByte(subaddress1); // 寄存器地位地址
i2c_WaitAck(); // 等待應答
for(i=0;i<length;i++)
{
i2c_SendByte(pData[i]); // 發送數據
i2c_WaitAck(); // 等待應答
}
i2c_Stop();
}
/*
* ADAU1701 Sigmastudio Safeload
* step 1. write target address to safeload address register, address start with 0x0815.
* step 2. write target data to safeload data register, address start with 0x0810.
* step 3. set bit IST in DSP CORE control register, address 0x081c, to inital safeload transmitter.
*/
void SIGMA_SAFELOAD_WRITE_REGISTER(int devAddress, int address, int length, const ADI_REG_TYPE *pData )
{
uint8_t subaddress0;
uint8_t subaddress1;
// uint16_t i=0;
static uint16_t f = 0; //set flag for triggering safeload transmite, after finished load 5 safeload data register.
subaddress0 = (address & 0xFF00)>>8;
subaddress1 = address & 0x00FF;
// write target data to 0x0810
i2c_Start();
i2c_SendByte(devAddress);
i2c_WaitAck(); // 等待應答
i2c_SendByte(0x08);
i2c_WaitAck(); // 等待應答
i2c_SendByte(0x10+f);
i2c_WaitAck(); // 等待應答
//number of prarameter need to loading, length need offset -2? deal with while length >5?
i2c_SendByte(0x00);
i2c_WaitAck(); // 等待應答
i2c_SendByte(pData[0]);
i2c_WaitAck(); // 等待應答
i2c_SendByte(pData[1]);
i2c_WaitAck(); // 等待應答
i2c_SendByte(pData[2]);
i2c_WaitAck(); // 等待應答
i2c_SendByte(pData[3]);
i2c_WaitAck(); // 等待應答
i2c_Stop();
// write target address to safeload address register start with 0x0815
i2c_Start();
i2c_SendByte(devAddress);
i2c_WaitAck(); // 等待應答
i2c_SendByte(0x08);
i2c_WaitAck(); // 等待應答
i2c_SendByte(0x15+f);
i2c_WaitAck(); // 等待應答
i2c_SendByte(subaddress0);
i2c_WaitAck(); // 等待應答
i2c_SendByte(subaddress1);
i2c_WaitAck(); // 等待應答
i2c_Stop();
// trigger safeload transmitter.
f++;
if(f == 5)
{
uint8_t recv0;
uint8_t recv1;
f = 0;
i2c_Start();
i2c_SendByte(devAddress);
i2c_WaitAck(); // 等待應答
i2c_SendByte(0x08);
i2c_WaitAck(); // 等待應答
i2c_SendByte(0x1C);
i2c_WaitAck(); // 等待應答
i2c_Start();
i2c_SendByte(devAddress+1);
i2c_WaitAck(); // 等待應答
recv0 = i2c_ReadByte();
i2c_Ack();
recv1 = i2c_ReadByte();
i2c_Stop(); // read data from DSP CORE control register.
recv1 = recv1 | 0x20 ; // set bit IST to trigger safeload.
i2c_Start(); // send data to DSP CORE control register.
i2c_SendByte(devAddress);
i2c_WaitAck(); // 等待應答
i2c_SendByte(0x08);
i2c_WaitAck(); // 等待應答
i2c_SendByte(0x1c);
i2c_WaitAck(); // 等待應答
i2c_SendByte(recv0);
i2c_WaitAck(); // 等待應答
i2c_SendByte(recv1);
i2c_WaitAck(); // 等待應答
i2c_Stop();
}
}
//靜音
ADI_REG_TYPE MASTER_MUTE_0[4] = {0x00, 0x00, 0x00, 0x00};
void MASTER_MUTE_download(void){
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x003D, 4, MASTER_MUTE_0); /* MuteNoSlewAlg1mute */
}
//取消靜音
ADI_REG_TYPE MASTER_UNMUTE_0[4] = {0x00, 0x80, 0x00, 0x00};
void MASTER_UNMUTE_download(void){
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x003D, 4, MASTER_UNMUTE_0); /* MuteNoSlewAlg1mute */
}
/*****************************************音量調節**********************************************/
// 調 bass 為 0
ADI_REG_TYPE BASS0_0[4] = {0xFF, 0xBB, 0x10, 0x41};
ADI_REG_TYPE BASS0_1[4] = {0x00, 0x35, 0xFF, 0xDB};
ADI_REG_TYPE BASS0_2[4] = {0x00, 0x10, 0x0D, 0xE0};
ADI_REG_TYPE BASS0_3[4] = {0x00, 0xA8, 0x6F, 0xB3};
ADI_REG_TYPE BASS0_4[4] = {0xFF, 0xD6, 0x72, 0x52};
void BASS0_download(void){
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0005, 4, BASS0_0); /* EQ1940Dual10B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0006, 4, BASS0_1); /* EQ1940Dual11B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0007, 4, BASS0_2); /* EQ1940Dual12B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0008, 4, BASS0_3); /* EQ1940Dual11A1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0009, 4, BASS0_4); /* EQ1940Dual12A1 */
}
// 調 bass 為 +1
ADI_REG_TYPE BASS1_0[4] = {0xFF, 0xBB, 0x10, 0x57};
ADI_REG_TYPE BASS1_1[4] = {0x00, 0x36, 0x0D, 0x40};
ADI_REG_TYPE BASS1_2[4] = {0x00, 0x10, 0x10, 0xF3};
ADI_REG_TYPE BASS1_3[4] = {0x00, 0xA8, 0x88, 0x0D};
ADI_REG_TYPE BASS1_4[4] = {0xFF, 0xD6, 0x6A, 0x4F};
void BASS1_download(void){
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0005, 4, BASS1_0); /* EQ1940Dual10B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0006, 4, BASS1_1); /* EQ1940Dual11B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0007, 4, BASS1_2); /* EQ1940Dual12B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0008, 4, BASS1_3); /* EQ1940Dual11A1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0009, 4, BASS1_4); /* EQ1940Dual12A1 */
}
// 調 bass 為 +2
ADI_REG_TYPE BASS2_0[4] = {0xFF, 0xBB, 0x10, 0x6D};
ADI_REG_TYPE BASS2_1[4] = {0x00, 0x36, 0x1A, 0x91};
ADI_REG_TYPE BASS2_2[4] = {0x00, 0x10, 0x14, 0x01};
ADI_REG_TYPE BASS2_3[4] = {0x00, 0xA8, 0xA0, 0x43};
ADI_REG_TYPE BASS2_4[4] = {0xFF, 0xD6, 0x62, 0x59};
void BASS2_download(void){
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0005, 4, BASS2_0); /* EQ1940Dual10B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0006, 4, BASS2_1); /* EQ1940Dual11B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0007, 4, BASS2_2); /* EQ1940Dual12B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0008, 4, BASS2_3); /* EQ1940Dual11A1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0009, 4, BASS2_4); /* EQ1940Dual12A1 */
}
// 調 bass 為 +3
ADI_REG_TYPE BASS3_0[4] = {0xFF, 0xBB, 0x10, 0x83};
ADI_REG_TYPE BASS3_1[4] = {0x00, 0x36, 0x27, 0xB9};
ADI_REG_TYPE BASS3_2[4] = {0x00, 0x10, 0x17, 0x06};
ADI_REG_TYPE BASS3_3[4] = {0x00, 0xA8, 0xB8, 0x2D};
ADI_REG_TYPE BASS3_4[4] = {0xFF, 0xD6, 0x5A, 0x7B};
void BASS3_download(void){
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0005, 4, BASS3_0); /* EQ1940Dual10B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0006, 4, BASS3_1); /* EQ1940Dual11B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0007, 4, BASS3_2); /* EQ1940Dual12B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0008, 4, BASS3_3); /* EQ1940Dual11A1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0009, 4, BASS3_4); /* EQ1940Dual12A1 */
}
// 調 bass 為 +4
ADI_REG_TYPE BASS4_0[4] = {0xFF, 0xBB, 0x10, 0x99};
ADI_REG_TYPE BASS4_1[4] = {0x00, 0x36, 0x34, 0xA1};
ADI_REG_TYPE BASS4_2[4] = {0x00, 0x10, 0x19, 0xFC};
ADI_REG_TYPE BASS4_3[4] = {0x00, 0xA8, 0xCF, 0xA3};
ADI_REG_TYPE BASS4_4[4] = {0xFF, 0xD6, 0x52, 0xC4};
void BASS4_download(void){
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0005, 4, BASS4_0); /* EQ1940Dual10B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0006, 4, BASS4_1); /* EQ1940Dual11B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0007, 4, BASS4_2); /* EQ1940Dual12B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0008, 4, BASS4_3); /* EQ1940Dual11A1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0009, 4, BASS4_4); /* EQ1940Dual12A1 */
}
// 調 bass 為 +5
ADI_REG_TYPE BASS5_0[4] = {0xFF, 0x81, 0xAA, 0xED};
ADI_REG_TYPE BASS5_1[4] = {0x00, 0x91, 0x19, 0x61};
ADI_REG_TYPE BASS5_2[4] = {0xFF, 0xEF, 0x16, 0x44};
ADI_REG_TYPE BASS5_3[4] = {0x00, 0x8F, 0xA6, 0xA8};
ADI_REG_TYPE BASS5_4[4] = {0xFF, 0xEF, 0x4E, 0x79};
void BASS5_download(void){
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0005, 4, BASS5_0); /* EQ1940Dual10B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0006, 4, BASS5_1); /* EQ1940Dual11B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0007, 4, BASS5_2); /* EQ1940Dual12B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0008, 4, BASS5_3); /* EQ1940Dual11A1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0009, 4, BASS5_4); /* EQ1940Dual12A1 */
}
// 調 bass 為 +6
ADI_REG_TYPE BASS6_0[4] = {0xFF, 0xBB, 0x10, 0xC2};
ADI_REG_TYPE BASS6_1[4] = {0x00, 0x36, 0x4D, 0x67};
ADI_REG_TYPE BASS6_2[4] = {0x00, 0x10, 0x1F, 0xAC};
ADI_REG_TYPE BASS6_3[4] = {0x00, 0xA8, 0xFC, 0xAE};
ADI_REG_TYPE BASS6_4[4] = {0xFF, 0xD6, 0x43, 0xF3};
void BASS6_download(void){
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0005, 4, BASS6_0); /* EQ1940Dual10B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0006, 4, BASS6_1); /* EQ1940Dual11B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0007, 4, BASS6_2); /* EQ1940Dual12B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0008, 4, BASS6_3); /* EQ1940Dual11A1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0009, 4, BASS6_4); /* EQ1940Dual12A1 */
}
// 調 bass 為 +7
ADI_REG_TYPE BASS7_0[4] = {0xFF, 0xBB, 0x10, 0xD5};
ADI_REG_TYPE BASS7_1[4] = {0x00, 0x36, 0x59, 0x26};
ADI_REG_TYPE BASS7_2[4] = {0x00, 0x10, 0x22, 0x5E};
ADI_REG_TYPE BASS7_3[4] = {0x00, 0xA9, 0x12, 0x08};
ADI_REG_TYPE BASS7_4[4] = {0xFF, 0xD6, 0x3C, 0xED};
void BASS7_download(void){
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0005, 4, BASS7_0); /* EQ1940Dual10B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0006, 4, BASS7_1); /* EQ1940Dual11B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0007, 4, BASS7_2); /* EQ1940Dual12B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0008, 4, BASS7_3); /* EQ1940Dual11A1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0009, 4, BASS7_4); /* EQ1940Dual12A1 */
}
// 調 bass 為 +8
ADI_REG_TYPE BASS8_0[4] = {0xFF, 0xBB, 0x10, 0xE8};
ADI_REG_TYPE BASS8_1[4] = {0x00, 0x36, 0x64, 0x65};
ADI_REG_TYPE BASS8_2[4] = {0x00, 0x10, 0x24, 0xF3};
ADI_REG_TYPE BASS8_3[4] = {0x00, 0xA9, 0x26, 0x7A};
ADI_REG_TYPE BASS8_4[4] = {0xFF, 0xD6, 0x36, 0x34};
void BASS8_download(void){
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0005, 4, BASS8_0); /* EQ1940Dual10B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0006, 4, BASS8_1); /* EQ1940Dual11B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0007, 4, BASS8_2); /* EQ1940Dual12B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0008, 4, BASS8_3); /* EQ1940Dual11A1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0009, 4, BASS8_4); /* EQ1940Dual12A1 */
}
// 調 bass 為 +9
ADI_REG_TYPE BASS9_0[4] = {0xFF, 0xBB, 0x10, 0xFA};
ADI_REG_TYPE BASS9_1[4] = {0x00, 0x36, 0x6F, 0x1A};
ADI_REG_TYPE BASS9_2[4] = {0x00, 0x10, 0x27, 0x68};
ADI_REG_TYPE BASS9_3[4] = {0x00, 0xA9, 0x39, 0xF2};
ADI_REG_TYPE BASS9_4[4] = {0xFF, 0xD6, 0x2F, 0xCC};
void BASS9_download(void){
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0005, 4, BASS9_0); /* EQ1940Dual10B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0006, 4, BASS9_1); /* EQ1940Dual11B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0007, 4, BASS9_2); /* EQ1940Dual12B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0008, 4, BASS9_3); /* EQ1940Dual11A1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0009, 4, BASS9_4); /* EQ1940Dual12A1 */
}
// 調 bass 為 +10
ADI_REG_TYPE BASS10_0[4] = {0xFF, 0xBB, 0x11, 0x0B};
ADI_REG_TYPE BASS10_1[4] = {0x00, 0x36, 0x79, 0x3F};
ADI_REG_TYPE BASS10_2[4] = {0x00, 0x10, 0x29, 0xBC};
ADI_REG_TYPE BASS10_3[4] = {0x00, 0xA9, 0x4C, 0x63};
ADI_REG_TYPE BASS10_4[4] = {0xFF, 0xD6, 0x29, 0xBC};
void BASS10_download(void){
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0005, 4, BASS10_0); /* EQ1940Dual10B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0006, 4, BASS10_1); /* EQ1940Dual11B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0007, 4, BASS10_2); /* EQ1940Dual12B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0008, 4, BASS10_3); /* EQ1940Dual11A1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0009, 4, BASS10_4); /* EQ1940Dual12A1 */
}
// 調 bass 為 -1
ADI_REG_TYPE BASS_1_0[4] = {0xFF, 0xBB, 0x10, 0x2B};
ADI_REG_TYPE BASS_1_1[4] = {0x00, 0x35, 0xF2, 0x78};
ADI_REG_TYPE BASS_1_2[4] = {0x00, 0x10, 0x0A, 0xCD};
ADI_REG_TYPE BASS_1_3[4] = {0x00, 0xA8, 0x57, 0x5D};
ADI_REG_TYPE BASS_1_4[4] = {0xFF, 0xD6, 0x7A, 0x53};
void BASS_1_download(void){
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0005, 4, BASS_1_0); /* EQ1940Dual10B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0006, 4, BASS_1_1); /* EQ1940Dual11B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0007, 4, BASS_1_2); /* EQ1940Dual12B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0008, 4, BASS_1_3); /* EQ1940Dual11A1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0009, 4, BASS_1_4); /* EQ1940Dual12A1 */
}
// 調 bass 為 -2
ADI_REG_TYPE BASS_2_0[4] = {0xFF, 0xBB, 0x10, 0x15};
ADI_REG_TYPE BASS_2_1[4] = {0x00, 0x35, 0xE5, 0x2E};
ADI_REG_TYPE BASS_2_2[4] = {0x00, 0x10, 0x07, 0xC1};
ADI_REG_TYPE BASS_2_3[4] = {0x00, 0xA8, 0x3F, 0x34};
ADI_REG_TYPE BASS_2_4[4] = {0xFF, 0xD6, 0x82, 0x45};
void BASS_2_download(void){
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0005, 4, BASS_2_0); /* EQ1940Dual10B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0006, 4, BASS_2_1); /* EQ1940Dual11B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0007, 4, BASS_2_2); /* EQ1940Dual12B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0008, 4, BASS_2_3); /* EQ1940Dual11A1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0009, 4, BASS_2_4); /* EQ1940Dual12A1 */
}
// 調 bass 為 -3
ADI_REG_TYPE BASS_3_0[4] = {0xFF, 0xBB, 0x0F, 0xFF};
ADI_REG_TYPE BASS_3_1[4] = {0x00, 0x35, 0xD8, 0x14};
ADI_REG_TYPE BASS_3_2[4] = {0x00, 0x10, 0x04, 0xBF};
ADI_REG_TYPE BASS_3_3[4] = {0x00, 0xA8, 0x27, 0x62};
ADI_REG_TYPE BASS_3_4[4] = {0xFF, 0xD6, 0x8A, 0x1B};
void BASS_3_download(void){
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0005, 4, BASS_3_0); /* EQ1940Dual10B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0006, 4, BASS_3_1); /* EQ1940Dual11B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0007, 4, BASS_3_2); /* EQ1940Dual12B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0008, 4, BASS_3_3); /* EQ1940Dual11A1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0009, 4, BASS_3_4); /* EQ1940Dual12A1 */
}
// 調 bass 為 -4
ADI_REG_TYPE BASS_4_0[4] = {0xFF, 0xBB, 0x0F, 0xEA};
ADI_REG_TYPE BASS_4_1[4] = {0x00, 0x35, 0xCB, 0x3D};
ADI_REG_TYPE BASS_4_2[4] = {0x00, 0x10, 0x01, 0xCC};
ADI_REG_TYPE BASS_4_3[4] = {0x00, 0xA8, 0x10, 0x0A};
ADI_REG_TYPE BASS_4_4[4] = {0xFF, 0xD6, 0x91, 0xC9};
void BASS_4_download(void){
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0005, 4, BASS_4_0); /* EQ1940Dual10B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0006, 4, BASS_4_1); /* EQ1940Dual11B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0007, 4, BASS_4_2); /* EQ1940Dual12B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0008, 4, BASS_4_3); /* EQ1940Dual11A1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0009, 4, BASS_4_4); /* EQ1940Dual12A1 */
}
// 調 bass 為 -5
ADI_REG_TYPE BASS_5_0[4] = {0xFF, 0xBB, 0x0F, 0xD5};
ADI_REG_TYPE BASS_5_1[4] = {0x00, 0x35, 0xBE, 0xBD};
ADI_REG_TYPE BASS_5_2[4] = {0x00, 0x0F, 0xFE, 0xEE};
ADI_REG_TYPE BASS_5_3[4] = {0x00, 0xA7, 0xF9, 0x50};
ADI_REG_TYPE BASS_5_4[4] = {0xFF, 0xD6, 0x99, 0x42};
void BASS_5_download(void){
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0005, 4, BASS_5_0); /* EQ1940Dual10B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0006, 4, BASS_5_1); /* EQ1940Dual11B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0007, 4, BASS_5_2); /* EQ1940Dual12B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0008, 4, BASS_5_3); /* EQ1940Dual11A1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0009, 4, BASS_5_4); /* EQ1940Dual12A1 */
}
// 調 bass 為 -6
ADI_REG_TYPE BASS_6_0[4] = {0xFF, 0xBB, 0x0F, 0xC1};
ADI_REG_TYPE BASS_6_1[4] = {0x00, 0x35, 0xB2, 0xA4};
ADI_REG_TYPE BASS_6_2[4] = {0x00, 0x0F, 0xFC, 0x27};
ADI_REG_TYPE BASS_6_3[4] = {0x00, 0xA7, 0xE3, 0x52};
ADI_REG_TYPE BASS_6_4[4] = {0xFF, 0xD6, 0xA0, 0x7E};
void BASS_6_download(void){
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0005, 4, BASS_6_0); /* EQ1940Dual10B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0006, 4, BASS_6_1); /* EQ1940Dual11B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0007, 4, BASS_6_2); /* EQ1940Dual12B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0008, 4, BASS_6_3); /* EQ1940Dual11A1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0009, 4, BASS_6_4); /* EQ1940Dual12A1 */
}
// 調 bass 為 -7
ADI_REG_TYPE BASS_7_0[4] = {0xFF, 0xBB, 0x0F, 0xAD};
ADI_REG_TYPE BASS_7_1[4] = {0x00, 0x35, 0xA7, 0x01};
ADI_REG_TYPE BASS_7_2[4] = {0x00, 0x0F, 0xF9, 0x7B};
ADI_REG_TYPE BASS_7_3[4] = {0x00, 0xA7, 0xCE, 0x2B};
ADI_REG_TYPE BASS_7_4[4] = {0xFF, 0xD6, 0xA7, 0x73};
void BASS_7_download(void){
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0005, 4, BASS_7_0); /* EQ1940Dual10B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0006, 4, BASS_7_1); /* EQ1940Dual11B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0007, 4, BASS_7_2); /* EQ1940Dual12B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0008, 4, BASS_7_3); /* EQ1940Dual11A1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0009, 4, BASS_7_4); /* EQ1940Dual12A1 */
}
// 調 bass 為 -8
ADI_REG_TYPE BASS_8_0[4] = {0xFF, 0xBB, 0x0F, 0x9B};
ADI_REG_TYPE BASS_8_1[4] = {0x00, 0x35, 0x9B, 0xE1};
ADI_REG_TYPE BASS_8_2[4] = {0x00, 0x0F, 0xF6, 0xEE};
ADI_REG_TYPE BASS_8_3[4] = {0x00, 0xA7, 0xB9, 0xF1};
ADI_REG_TYPE BASS_8_4[4] = {0xFF, 0xD6, 0xAE, 0x1A};
void BASS_8_download(void){
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0005, 4, BASS_8_0); /* EQ1940Dual10B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0006, 4, BASS_8_1); /* EQ1940Dual11B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0007, 4, BASS_8_2); /* EQ1940Dual12B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0008, 4, BASS_8_3); /* EQ1940Dual11A1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0009, 4, BASS_8_4); /* EQ1940Dual12A1 */
}
// 調 bass 為 -9
ADI_REG_TYPE BASS_9_0[4] = {0xFF, 0xBB, 0x0F, 0x89};
ADI_REG_TYPE BASS_9_1[4] = {0x00, 0x35, 0x91, 0x4B};
ADI_REG_TYPE BASS_9_2[4] = {0x00, 0x0F, 0xF4, 0x80};
ADI_REG_TYPE BASS_9_3[4] = {0x00, 0xA7, 0xA6, 0xB3};
ADI_REG_TYPE BASS_9_4[4] = {0xFF, 0xD6, 0xB4, 0x6E};
void BASS_9_download(void){
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0005, 4, BASS_9_0); /* EQ1940Dual10B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0006, 4, BASS_9_1); /* EQ1940Dual11B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0007, 4, BASS_9_2); /* EQ1940Dual12B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0008, 4, BASS_9_3); /* EQ1940Dual11A1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0009, 4, BASS_9_4); /* EQ1940Dual12A1 */
}
// 調 bass 為 -10
ADI_REG_TYPE BASS_10_0[4] = {0xFF, 0xBB, 0x0F, 0x79};
ADI_REG_TYPE BASS_10_1[4] = {0x00, 0x35, 0x87, 0x48};
ADI_REG_TYPE BASS_10_2[4] = {0x00, 0x0F, 0xF2, 0x33};
ADI_REG_TYPE BASS_10_3[4] = {0x00, 0xA7, 0x94, 0x7F};
ADI_REG_TYPE BASS_10_4[4] = {0xFF, 0xD6, 0xBA, 0x6B};
void BASS_10_download(void){
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0005, 4, BASS_10_0); /* EQ1940Dual10B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0006, 4, BASS_10_1); /* EQ1940Dual11B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0007, 4, BASS_10_2); /* EQ1940Dual12B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0008, 4, BASS_10_3); /* EQ1940Dual11A1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0009, 4, BASS_10_4); /* EQ1940Dual12A1 */
}
/*****************************************調節Treble**********************************************/
// 調 Treble 為 0
ADI_REG_TYPE TRE0_0[4] = {0xFF, 0x81, 0xAA, 0x26};
ADI_REG_TYPE TRE0_1[4] = {0x00, 0x90, 0xA1, 0xE3};
ADI_REG_TYPE TRE0_2[4] = {0xFF, 0xEF, 0x26, 0x03};
ADI_REG_TYPE TRE0_3[4] = {0x00, 0x8F, 0x2F, 0xD7};
ADI_REG_TYPE TRE0_4[4] = {0xFF, 0xEF, 0x5E, 0x1D};
void TRE0_download(void){
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0005, 4, TRE0_0); /* EQ1940Dual10B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0006, 4, TRE0_1); /* EQ1940Dual11B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0007, 4, TRE0_2); /* EQ1940Dual12B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0008, 4, TRE0_3); /* EQ1940Dual11A1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0009, 4, TRE0_4); /* EQ1940Dual12A1 */
}
// 調 Treble 為 1
ADI_REG_TYPE TRE1_0[4] = {0xFF, 0x79, 0x2A, 0xD9};
ADI_REG_TYPE TRE1_1[4] = {0x00, 0x9E, 0x0C, 0xB1};
ADI_REG_TYPE TRE1_2[4] = {0xFF, 0xEA, 0x46, 0xF3};
ADI_REG_TYPE TRE1_3[4] = {0x00, 0x8B, 0x72, 0xF0};
ADI_REG_TYPE TRE1_4[4] = {0xFF, 0xF3, 0x0E, 0x93};
void TRE1_download(void){
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0005, 4, TRE1_0); /* EQ1940Dual10B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0006, 4, TRE1_1); /* EQ1940Dual11B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0007, 4, TRE1_2); /* EQ1940Dual12B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0008, 4, TRE1_3); /* EQ1940Dual11A1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0009, 4, TRE1_4); /* EQ1940Dual12A1 */
}
// 調 Treble 為 2
ADI_REG_TYPE TRE2_0[4] = {0xFF, 0x70, 0x24, 0x03};
ADI_REG_TYPE TRE2_1[4] = {0x00, 0xAC, 0x4D, 0x82};
ADI_REG_TYPE TRE2_2[4] = {0xFF, 0xE5, 0x1A, 0x31};
ADI_REG_TYPE TRE2_3[4] = {0x00, 0x87, 0x7A, 0x69};
ADI_REG_TYPE TRE2_4[4] = {0xFF, 0xF6, 0xF9, 0xE1};
void TRE2_download(void){
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0005, 4, TRE2_0); /* EQ1940Dual10B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0006, 4, TRE2_1); /* EQ1940Dual11B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0007, 4, TRE2_2); /* EQ1940Dual12B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0008, 4, TRE2_3); /* EQ1940Dual11A1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0009, 4, TRE2_4); /* EQ1940Dual12A1 */
}
// 調 Treble 為 3
ADI_REG_TYPE TRE3_0[4] = {0xFF, 0x66, 0x99, 0x4A};
ADI_REG_TYPE TRE3_1[4] = {0x00, 0xBB, 0x5E, 0x92};
ADI_REG_TYPE TRE3_2[4] = {0xFF, 0xDF, 0xA1, 0xD3};
ADI_REG_TYPE TRE3_3[4] = {0x00, 0x83, 0x47, 0xDF};
ADI_REG_TYPE TRE3_4[4] = {0xFF, 0xFB, 0x1E, 0x71};
void TRE3_download(void){
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0005, 4, TRE3_0); /* EQ1940Dual10B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0006, 4, TRE3_1); /* EQ1940Dual11B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0007, 4, TRE3_2); /* EQ1940Dual12B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0008, 4, TRE3_3); /* EQ1940Dual11A1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0009, 4, TRE3_4); /* EQ1940Dual12A1 */
}
// 調 Treble 為 4
ADI_REG_TYPE TRE4_0[4] = {0xFF, 0x5C, 0x90, 0x9C};
ADI_REG_TYPE TRE4_1[4] = {0x00, 0xCB, 0x36, 0x87};
ADI_REG_TYPE TRE4_2[4] = {0xFF, 0xD9, 0xE1, 0x3E};
ADI_REG_TYPE TRE4_3[4] = {0x00, 0x7E, 0xDD, 0xEC};
ADI_REG_TYPE TRE4_4[4] = {0xFF, 0xFF, 0x79, 0xB3};
void TRE4_download(void){
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0005, 4, TRE4_0); /* EQ1940Dual10B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0006, 4, TRE4_1); /* EQ1940Dual11B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0007, 4, TRE4_2); /* EQ1940Dual12B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0008, 4, TRE4_3); /* EQ1940Dual11A1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0009, 4, TRE4_4); /* EQ1940Dual12A1 */
}
// 調 Treble 為 5
ADI_REG_TYPE TRE5_0[4] = {0xFF, 0x52, 0x12, 0x42};
ADI_REG_TYPE TRE5_1[4] = {0x00, 0xDB, 0xC8, 0x48};
ADI_REG_TYPE TRE5_2[4] = {0xFF, 0xD3, 0xDD, 0x35};
ADI_REG_TYPE TRE5_3[4] = {0x00, 0x7A, 0x40, 0x36};
ADI_REG_TYPE TRE5_4[4] = {0x00, 0x04, 0x08, 0x0A};
void TRE5_download(void){
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0005, 4, TRE5_0); /* EQ1940Dual10B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0006, 4, TRE5_1); /* EQ1940Dual11B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0007, 4, TRE5_2); /* EQ1940Dual12B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0008, 4, TRE5_3); /* EQ1940Dual11A1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0009, 4, TRE5_4); /* EQ1940Dual12A1 */
}
// 調 Treble 為 6
ADI_REG_TYPE TRE6_0[4] = {0xFF, 0x47, 0x28, 0xEF};
ADI_REG_TYPE TRE6_1[4] = {0x00, 0xED, 0x02, 0xF3};
ADI_REG_TYPE TRE6_2[4] = {0xFF, 0xCD, 0x9B, 0xD8};
ADI_REG_TYPE TRE6_3[4] = {0x00, 0x75, 0x73, 0x72};
ADI_REG_TYPE TRE6_4[4] = {0x00, 0x08, 0xC4, 0xD4};
void TRE6_download(void){
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0005, 4, TRE6_0); /* EQ1940Dual10B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0006, 4, TRE6_1); /* EQ1940Dual11B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0007, 4, TRE6_2); /* EQ1940Dual12B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0008, 4, TRE6_3); /* EQ1940Dual11A1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0009, 4, TRE6_4); /* EQ1940Dual12A1 */
}
// 調 Treble 為 7
ADI_REG_TYPE TRE7_0[4] = {0xFF, 0x3B, 0xE1, 0xA8};
ADI_REG_TYPE TRE7_1[4] = {0x00, 0xFE, 0xD1, 0xF7};
ADI_REG_TYPE TRE7_2[4] = {0xFF, 0xC7, 0x24, 0xA0};
ADI_REG_TYPE TRE7_3[4] = {0x00, 0x70, 0x7D, 0x59};
ADI_REG_TYPE TRE7_4[4] = {0x00, 0x0D, 0xAA, 0x68};
void TRE7_download(void){
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0005, 4, TRE7_0); /* EQ1940Dual10B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0006, 4, TRE7_1); /* EQ1940Dual11B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0007, 4, TRE7_2); /* EQ1940Dual12B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0008, 4, TRE7_3); /* EQ1940Dual11A1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0009, 4, TRE7_4); /* EQ1940Dual12A1 */
}
// 調 Treble 為 8
ADI_REG_TYPE TRE8_0[4] = {0xFF, 0x30, 0x4B, 0xA0};
ADI_REG_TYPE TRE8_1[4] = {0x01, 0x11, 0x1D, 0x56};
ADI_REG_TYPE TRE8_2[4] = {0xFF, 0xC0, 0x80, 0x40};
ADI_REG_TYPE TRE8_3[4] = {0x00, 0x6B, 0x64, 0x9B};
ADI_REG_TYPE TRE8_4[4] = {0x00, 0x12, 0xB2, 0x2E};
void TRE8_download(void){
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0005, 4, TRE8_0); /* EQ1940Dual10B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0006, 4, TRE8_1); /* EQ1940Dual11B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0007, 4, TRE8_2); /* EQ1940Dual12B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0008, 4, TRE8_3); /* EQ1940Dual11A1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0009, 4, TRE8_4); /* EQ1940Dual12A1 */
}
// 調 Treble 為 9
ADI_REG_TYPE TRE9_0[4] = {0xFF, 0x24, 0x77, 0xF0};
ADI_REG_TYPE TRE9_1[4] = {0x01, 0x23, 0xCA, 0x10};
ADI_REG_TYPE TRE9_2[4] = {0xFF, 0xB9, 0xB8, 0x89};
ADI_REG_TYPE TRE9_3[4] = {0x00, 0x66, 0x30, 0xBE};
ADI_REG_TYPE TRE9_4[4] = {0x00, 0x17, 0xD4, 0xB9};
void TRE9_download(void){
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0005, 4, TRE9_0); /* EQ1940Dual10B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0006, 4, TRE9_1); /* EQ1940Dual11B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0007, 4, TRE9_2); /* EQ1940Dual12B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0008, 4, TRE9_3); /* EQ1940Dual11A1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0009, 4, TRE9_4); /* EQ1940Dual12A1 */
}
// 調 Treble 為 10
ADI_REG_TYPE TRE10_0[4] = {0xFF, 0x18, 0x79, 0x3D};
ADI_REG_TYPE TRE10_1[4] = {0x01, 0x36, 0xBA, 0xB4};
ADI_REG_TYPE TRE10_2[4] = {0xFF, 0xB2, 0xD8, 0x28};
ADI_REG_TYPE TRE10_3[4] = {0x00, 0x60, 0xE9, 0xF5};
ADI_REG_TYPE TRE10_4[4] = {0x00, 0x1D, 0x09, 0xF1};
void TRE10_download(void){
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0005, 4, TRE10_0); /* EQ1940Dual10B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0006, 4, TRE10_1); /* EQ1940Dual11B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0007, 4, TRE10_2); /* EQ1940Dual12B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0008, 4, TRE10_3); /* EQ1940Dual11A1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0009, 4, TRE10_4); /* EQ1940Dual12A1 */
}
// 調 Treble 為 -1
ADI_REG_TYPE TRE_1_0[4] = {0xFF, 0x89, 0xA0, 0x5C};
ADI_REG_TYPE TRE_1_1[4] = {0x00, 0x84, 0x0F, 0x8B};
ADI_REG_TYPE TRE_1_2[4] = {0xFF, 0xF3, 0xB6, 0x7B};
ADI_REG_TYPE TRE_1_3[4] = {0x00, 0x92, 0xB0, 0x70};
ADI_REG_TYPE TRE_1_4[4] = {0xFF, 0xEB, 0xE9, 0x2D};
void TRE_1_download(void){
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0005, 4, TRE_1_0); /* EQ1940Dual10B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0006, 4, TRE_1_1); /* EQ1940Dual11B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0007, 4, TRE_1_2); /* EQ1940Dual12B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0008, 4, TRE_1_3); /* EQ1940Dual11A1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0009, 4, TRE_1_4); /* EQ1940Dual12A1 */
}
// 調 Treble 為 -2
ADI_REG_TYPE TRE_2_0[4] = {0xFF, 0x91, 0x0D, 0xD1};
ADI_REG_TYPE TRE_2_1[4] = {0x00, 0x78, 0x55, 0x24};
ADI_REG_TYPE TRE_2_2[4] = {0xFF, 0xF7, 0xF8, 0x8D};
ADI_REG_TYPE TRE_2_3[4] = {0x00, 0x95, 0xF4, 0xE1};
ADI_REG_TYPE TRE_2_4[4] = {0xFF, 0xE8, 0xAF, 0x9D};
void TRE_2_download(void){
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0005, 4, TRE_2_0); /* EQ1940Dual10B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0006, 4, TRE_2_1); /* EQ1940Dual11B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0007, 4, TRE_2_2); /* EQ1940Dual12B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0008, 4, TRE_2_3); /* EQ1940Dual11A1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0009, 4, TRE_2_4); /* EQ1940Dual12A1 */
}
// 調 Treble 為 -3
ADI_REG_TYPE TRE_3_0[4] = {0xFF, 0x97, 0xF4, 0x7E};
ADI_REG_TYPE TRE_3_1[4] = {0x00, 0x6D, 0x6F, 0x8E};
ADI_REG_TYPE TRE_3_2[4] = {0xFF, 0xFB, 0xED, 0x5A};
ADI_REG_TYPE TRE_3_3[4] = {0x00, 0x98, 0xFE, 0x07};
ADI_REG_TYPE TRE_3_4[4] = {0xFF, 0xE5, 0xB0, 0x92};
void TRE_3_download(void){
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0005, 4, TRE_3_0); /* EQ1940Dual10B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0006, 4, TRE_3_1); /* EQ1940Dual11B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0007, 4, TRE_3_2); /* EQ1940Dual12B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0008, 4, TRE_3_3); /* EQ1940Dual11A1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0009, 4, TRE_3_4); /* EQ1940Dual12A1 */
}
// 調 Treble 為 -4
ADI_REG_TYPE TRE_4_0[4] = {0xFF, 0x9E, 0x57, 0xC0};
ADI_REG_TYPE TRE_4_1[4] = {0x00, 0x63, 0x59, 0x7B};
ADI_REG_TYPE TRE_4_2[4] = {0xFF, 0xFF, 0x96, 0xD1};
ADI_REG_TYPE TRE_4_3[4] = {0x00, 0x9B, 0xCD, 0x5F};
ADI_REG_TYPE TRE_4_4[4] = {0xFF, 0xE2, 0xEA, 0x96};
void TRE_4_download(void){
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0005, 4, TRE_4_0); /* EQ1940Dual10B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0006, 4, TRE_4_1); /* EQ1940Dual11B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0007, 4, TRE_4_2); /* EQ1940Dual12B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0008, 4, TRE_4_3); /* EQ1940Dual11A1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0009, 4, TRE_4_4); /* EQ1940Dual12A1 */
}
// 調 Treble 為 -5
ADI_REG_TYPE TRE_5_0[4] = {0xFF, 0xA4, 0x3C, 0x14};
ADI_REG_TYPE TRE_5_1[4] = {0x00, 0x5A, 0x0B, 0xD4};
ADI_REG_TYPE TRE_5_2[4] = {0x00, 0x02, 0xF7, 0x83};
ADI_REG_TYPE TRE_5_3[4] = {0x00, 0x9E, 0x64, 0xE0};
ADI_REG_TYPE TRE_5_4[4] = {0xFF, 0xE0, 0x5B, 0xB5};
void TRE_5_download(void){
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0005, 4, TRE_5_0); /* EQ1940Dual10B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0006, 4, TRE_5_1); /* EQ1940Dual11B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0007, 4, TRE_5_2); /* EQ1940Dual12B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0008, 4, TRE_5_3); /* EQ1940Dual11A1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0009, 4, TRE_5_4); /* EQ1940Dual12A1 */
}
// 調 Treble 為 -6
ADI_REG_TYPE TRE_6_0[4] = {0xFF, 0xAE, 0x9E, 0x12};
ADI_REG_TYPE TRE_6_1[4] = {0x00, 0x49, 0xA6, 0xD8};
ADI_REG_TYPE TRE_6_2[4] = {0x00, 0x08, 0xEB, 0x4B};
ADI_REG_TYPE TRE_6_3[4] = {0x00, 0xA2, 0xF6, 0x1D};
ADI_REG_TYPE TRE_6_4[4] = {0xFF, 0xDB, 0xD9, 0xAD};
void TRE_6_download(void){
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0005, 4, TRE_6_0); /* EQ1940Dual10B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0006, 4, TRE_6_1); /* EQ1940Dual11B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0007, 4, TRE_6_2); /* EQ1940Dual12B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0008, 4, TRE_6_3); /* EQ1940Dual11A1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0009, 4, TRE_6_4); /* EQ1940Dual12A1 */
}
// 調 Treble 為 -7
ADI_REG_TYPE TRE_7_0[4] = {0xFF, 0xA9, 0xA6, 0xD8};
ADI_REG_TYPE TRE_7_1[4] = {0x00, 0x51, 0x7E, 0x1E};
ADI_REG_TYPE TRE_7_2[4] = {0x00, 0x06, 0x12, 0x86};
ADI_REG_TYPE TRE_7_3[4] = {0x00, 0xA0, 0xC6, 0xE8};
ADI_REG_TYPE TRE_7_4[4] = {0xFF, 0xDE, 0x01, 0x9C};
void TRE_7_download(void){
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0005, 4, TRE_7_0); /* EQ1940Dual10B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0006, 4, TRE_7_1); /* EQ1940Dual11B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0007, 4, TRE_7_2); /* EQ1940Dual12B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0008, 4, TRE_7_3); /* EQ1940Dual11A1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0009, 4, TRE_7_4); /* EQ1940Dual12A1 */
}
// 調 Treble 為 -8
ADI_REG_TYPE TRE_8_0[4] = {0xFF, 0xB3, 0x28, 0x38};
ADI_REG_TYPE TRE_8_1[4] = {0x00, 0x42, 0x7B, 0xD0};
ADI_REG_TYPE TRE_8_2[4] = {0x00, 0x0B, 0x85, 0x88};
ADI_REG_TYPE TRE_8_3[4] = {0x00, 0xA4, 0xF5, 0x56};
ADI_REG_TYPE TRE_8_4[4] = {0xFF, 0xD9, 0xE1, 0x1A};
void TRE_8_download(void){
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0005, 4, TRE_8_0); /* EQ1940Dual10B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0006, 4, TRE_8_1); /* EQ1940Dual11B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0007, 4, TRE_8_2); /* EQ1940Dual12B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0008, 4, TRE_8_3); /* EQ1940Dual11A1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0009, 4, TRE_8_4); /* EQ1940Dual12A1 */
}
// 調 Treble 為 -9
ADI_REG_TYPE TRE_9_0[4] = {0xFF, 0xB7, 0x4C, 0x01};
ADI_REG_TYPE TRE_9_1[4] = {0x00, 0x3B, 0xF2, 0x69};
ADI_REG_TYPE TRE_9_2[4] = {0x00, 0x0D, 0xE5, 0x16};
ADI_REG_TYPE TRE_9_3[4] = {0x00, 0xA6, 0xC7, 0x87};
ADI_REG_TYPE TRE_9_4[4] = {0xFF, 0xD8, 0x14, 0xF9};
void TRE_9_download(void){
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0005, 4, TRE_9_0); /* EQ1940Dual10B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0006, 4, TRE_9_1); /* EQ1940Dual11B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0007, 4, TRE_9_2); /* EQ1940Dual12B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0008, 4, TRE_9_3); /* EQ1940Dual11A1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0009, 4, TRE_9_4); /* EQ1940Dual12A1 */
}
// 調 Treble 為 -10
ADI_REG_TYPE TRE_10_0[4] = {0xFF, 0xBB, 0x10, 0x41};
ADI_REG_TYPE TRE_10_1[4] = {0x00, 0x35, 0xFF, 0xDB};
ADI_REG_TYPE TRE_10_2[4] = {0x00, 0x10, 0x0D, 0xE0};
ADI_REG_TYPE TRE_10_3[4] = {0x00, 0xA8, 0x6F, 0xB3};
ADI_REG_TYPE TRE_10_4[4] = {0xFF, 0xD6, 0x72, 0x52};
void TRE_10_download(void){
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0005, 4, TRE_10_0); /* EQ1940Dual10B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0006, 4, TRE_10_1); /* EQ1940Dual11B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0007, 4, TRE_10_2); /* EQ1940Dual12B1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0008, 4, TRE_10_3); /* EQ1940Dual11A1 */
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_, 0x0009, 4, TRE_10_4); /* EQ1940Dual12A1 */
}
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